Branch prediction method and apparatus

Details Branch prediction method and apparatus Branch prediction method and apparatus

2005-09-06

2005-09-06

Thai, Tuan V. (Department: 2186)

Electrical computers and digital processing systems: memory

Address formation

Operand address generation

C711S100000, C711S141000, C712S237000

Reexamination Certificate

active

06941444

ABSTRACT:
A computer has its programs in instructions and operand descriptors to specify the operands of the instructions. Apparatus for identifying data coherency and encaching requirements and providing access control in a computer system with operands of its instructions specified by operand descriptors is described hereby. In a computer system wherein data items (operands) are represented by operand descriptors that can comprise object numbers, addresses, data types and sizes, vector information and other relevant information concerning the operands, with one bit to identify if the data coherency is to be maintained, another bit to identify if the data is cached, and a field to provide information on the privilege of Read, Write and Execute, and Supervisor or User mode. When an operand is accessed, the respective access control code is checked to validate if any protection is violated, whether caching is activated and whether it is required to maintain data coherency.

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