Blocking processing restrictions based on addresses

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address

Reexamination Certificate

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C711S148000, C711S147000, C711S156000, C711S151000, C711S163000, C712S002000, C712S023000, C712S205000, C712S244000, C709S213000

Reexamination Certificate

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06996698

ABSTRACT:
Processing restrictions of a computing environment are filtered and blocked, in certain circumstances, such that processing continues despite the restrictions. One restriction includes an indication that fetching of storage keys is prohibited, in response to a buffer miss. When a processing unit of the computing environment is met with this restriction, it performs a comparison of addresses, which indicates whether the fetching can continue. If fetching can continue, the restriction is ignored.

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“z/Architecture Principles of Operation,” IBM Publication No. SA22-7832-00, Dec. 2000, Chapter 3, pp. 9-10 and 27-49; Chapter 10, pp. 18-19, 29-30 and 91.

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