Satisfiability (SAT) based bounded model checkers
Scalable system for simulation and emulation of electronic...
Selecting design points on parameter functions having first...
Selection of initial states for formal verification
Selectively reducing the number of cell evaluations in a...
Semiconductor device characteristic simulation apparatus and...
Semiconductor integrated circuit verification system
Sequential logic in simulation instrumentation of an...
Sequential machine for solving boolean satisfiability (SAT)...
Shared memory for co-simulation
Signal override for simulation models
Simplified data signal support for diagramming environment...
Simplified data signal support for diagramming environment...
Simulated circuit node initializing and monitoring
Simulating a logic design
Simulation and timing control for hardware accelerated...
Simulation based power optimization
Simulation circuit of PCI express endpoint and downstream...
Simulation circuit pattern evaluation method, manufacturing...
Simulation device and its method for simulating operation of lar