Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation
Reexamination Certificate
2005-03-08
2008-03-18
Rodriguez, Paul (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Circuit simulation
C703S013000
Reexamination Certificate
active
07346482
ABSTRACT:
Co-simulation of a circuit design includes simulating a first subset of blocks of the circuit design on a software-based co-simulation platform, simulating a second subset of the blocks of the circuit design on a hardware-based co-simulation platform, and maintaining coherency for a memory block of the circuit design between a first representation of data in the memory block on the software-based co-simulation platform and a second representation of the data in the memory block on the hardware-based co-simulation platform. Coherency is maintained by managing mutually exclusive access to the memory block from the first subset of blocks and the second subset of blocks.
REFERENCES:
patent: 3601809 (1971-08-01), Gray et al.
patent: 5019968 (1991-05-01), Wang et al.
patent: 5111413 (1992-05-01), Lazansky et al.
patent: 5768567 (1998-06-01), Klein et al.
patent: 5771370 (1998-06-01), Klein
patent: 5870588 (1999-02-01), Rompaey et al.
patent: 6026421 (2000-02-01), Sabin et al.
patent: 6212489 (2001-04-01), Klein et al.
patent: 6389383 (2002-05-01), Sarathy et al.
patent: 6473841 (2002-10-01), Ueda et al.
patent: 6651225 (2003-11-01), Lin et al.
patent: 6701501 (2004-03-01), Waters et al.
patent: 6754763 (2004-06-01), Lin
patent: 7007261 (2006-02-01), Ballagh et al.
patent: 7124376 (2006-10-01), Zaidi et al.
patent: 2002/0120909 (2002-08-01), Brouchard et al.
patent: 2003/0144828 (2003-07-01), Lin
patent: 2004/0181385 (2004-09-01), Milne et al.
patent: 2004/0260528 (2004-12-01), Ballagh et al.
patent: 2005/0165597 (2005-07-01), Nightingale
patent: 2006/0174221 (2006-08-01), Kinsella et al.
U.S. Appl. No. 10/949,049, filed Sep. 24, 2004, Milne et al.
Lt. Rick Miller; “C++ Arrays—Part 1”; [Verified by Wayback Machine, Apr. 2001]1 pp. 1-4.
Reggie Huff; “RAM is Not an Acronym”; [Verified by Wayback Machine, Jan. 2002]; pp. 1-5.
“FIFO Queing Discipline”; [Verified by Wayback Machine, 2003]; pp. 1-3.
Ballagh Jonathan B.
Milne Roger B.
Shirazi Nabeel
Stone Joshua Ian
Kim Eunhee
Maunu LeRoy D.
Rodriguez Paul
Xilinx , Inc.
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