Selectively reducing the number of cell evaluations in a...

Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation

Reexamination Certificate

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Details

C703S013000, C703S019000, C716S030000, C714S724000

Reexamination Certificate

active

07555417

ABSTRACT:
An electrical circuit comprising a plurality of cells can be simulated to produce simulation results by sorting cells between active status cells and inactive status cells and reducing the processing of simulation results from inactive cells to thereby save simulation time.

REFERENCES:
patent: 6389379 (2002-05-01), Lin et al.
patent: 2003/0011500 (2003-01-01), Takeuchi et al.
patent: 2003/0036893 (2003-02-01), Chen
patent: 2003/0083856 (2003-05-01), Yoshimura et al.
patent: 2003/0110462 (2003-06-01), Cohn et al.
patent: 2003/0225562 (2003-12-01), Singh
patent: 2004/0080343 (2004-04-01), Nicolaidis
patent: 2004/0083442 (2004-04-01), Arcidiacono et al.
patent: 2004/0103330 (2004-05-01), Bonnett
patent: 2004/0153926 (2004-08-01), Abdel-Hafez et al.
patent: 2005/0144580 (2005-06-01), Berkram et al.
patent: 2006/0117274 (2006-06-01), Tseng et al.
Razdan et al., “Exploitation of Periodicity in Logic Simulation of Synchronous Circuits.”Proceedings of the International Conference on Computer Aided Design, 1990.
Takamine et al., “Clock Event Suppression Algorithm of Velvet and its Application to S-820 Development.”Proceedings of the 25th ACM/IEEE Conference on Design Automation, Jun. 1988.
Ulrich, “A Design Verification Methodology Based on Concurrent Simulation and Clock Suppression.”Proceedings of the Twentieth Design Automation Conference, Jun. 1983.
Ulrich et. al., “Design Verification for Very Large Networks Based on Concurrent Simulation and Clock Suppression.”IEEE International Conference on Computer Design(ICCD), Jun. 1983.
Ulrich, “Exclusive Simulation of Activity in Digital Networks.”Communications of the ACM, vol. 12 Issue 2, Feb. 1969.
Ulrich and Hebert, “Speed and Accuracy in Digital Network Simulation Based on Structural Modeling.”Proceedings of the Nineteenth Design Automation Conference, Jun. 1982.
Weber et al., “High Performance Simulation Techniques for Digital Systems: Periodic Signal Suppression in a Concurrent Fault Simulator.”Proceedings of the Conference on European Design Automation, Feb. 1991.

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