Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation
Reexamination Certificate
1998-06-24
2001-11-20
Teska, Kevin J. (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Circuit simulation
C703S002000, C716S030000
Reexamination Certificate
active
06321183
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device characteristic simulation apparatus and its method, and is suitably applied to, for example, a semiconductor device characteristic simulation apparatus and its method for estimating and analyzing performance characteristics of a semiconductor integrated circuit constituted by connecting such circuit devices as a transistor to a semiconductor substrate.
2. Description of the Related Art
A conventional semiconductor integrated circuit represents a semiconductor device in which electronic circuits are constituted like a matrix by setting necessary components such as a transistor, a diode, a resistor, and a capacitor on a silicon substrate (a wafer) and interconnecting the components. For example, in a fabrication process of a semiconductor integrated circuit by forming metal oxide semiconductor (MOS) transistors on the entire surface of a wafer like a matrix, a fluctuation exists in each data of dimensions including a gate length, oxide film thickness, and implanted number of ions (hereinafter, these processing factors under fabrication are referred to as process parameters) of a MOS transistor formed by applying predetermined types of processing to the surface of the wafer.
A simulation apparatus and simulation software are developed for estimating and analyzing the fluctuation in device characteristic values of a MOS transistor formed on the surface of a wafer (what the device characteristic value denotes in this case is a voltage applied to the gate portion of the transistor so that a drain current with a certain value starts to flow. Such voltage is hereinafter referred to as threshold voltage Vth), and, moreover, checking the electric current distribution.
Therefore, this type of simulation apparatus calculates (simulates) a fluctuation in device characteristic values (the fluctuation in threshold voltages Vth) of MOS transistors which are fabricated with varying measurement data on each process parameter such as a gate length, oxide film thickness and implanted number of ions, and graphs out the calculation in normal distribution curves. Thereby, when a MOS transistor is formed on the surface of a wafer with a fluctuation in measurement data of process parameters, a user reads the device characteristic values of the transistor from the graph obtained thus.
The aforesaid simulation apparatus can display the fluctuation in device characteristic values in the form of a table or a graph when a MOS transistor is formed on the surface of a wafer and each process parameter fluctuates in accordance with a normal distribution. However, the said apparatus have neither a function for displaying the distribution of the fluctuation in each process parameter in accordance with fluctuating measurement data of process parameters under a fabrication process, nor a function for image-displaying the distribution of the fluctuation in device characteristic values on the surface of the actual wafer.
SUMMARY OF THE INVENTION
In view of foregoing, an object of the present invention is to provide a semiconductor device characteristic simulation apparatus and its method in which performance characteristics of a semiconductor integrated circuit are image-displayed as a distribution on a semiconductor substrate for accurate estimation and analysis without actually fabricating the semiconductor integrated circuit.
The foregoing object and other objects of the invention have been achieved by the provision of a semiconductor device characteristic simulation apparatus and its method in which: for simulating the fluctuation in device characteristic values of a plurality of semiconductor integrated circuits formed on a semiconductor substrate by applying a plurality of processing to the semiconductor substrate, simulation data for executing the simulation in accordance with measurement data on a plurality of predetermined portions on the semiconductor substrate after the processing are generated; device characteristic values of the semiconductor integrated circuit are calculated based on the simulation data; and the distribution of the fluctuation in the device characteristic values on the semiconductor substrate are image-displayed.
By displaying the fluctuation in device characteristic values generated when forming a semiconductor integrated circuit on a semiconductor substrate in accordance with the simulation data generated in accordance with the measurement data for predetermined portions after applying various types of processing to the substrate as a distribution on the semiconductor substrate, it is possible to display the distribution of the fluctuation in device characteristic values of the semiconductor integrated circuit on the semiconductor substrate so as to be easily visually recognized.
As described above, according to the present invention, it is possible to realize a semiconductor device characteristic simulation apparatus for accurate estimation and analysis of performance characteristics of a semiconductor integrated circuit by image-displaying the distribution of the performance characteristics on a semiconductor substrate without actually fabricating the semiconductor integrated circuit.
The nature, principle and utility of the invention will become more apparent from the following detailed description when read in conjunction with the accompanying drawings in which like parts are designated by like reference numerals or characters.
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“Wafer Map Distribution of Statistically Correlated Parameters”, Simulation Standard, For Circuit Simulation and Spice Modeling Engineers, Silvaco International, vol. 7, No. 9, Sep. 1996, pp. 1-3.
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Broda Samuel
Sonnenschein Nath & Rosenthal
Sony Corporation
Teska Kevin J.
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