Sequential logic in simulation instrumentation of an...

Details Sequential logic in simulation instrumentation of an... Sequential logic in simulation instrumentation of an...

2007-05-07

2010-11-16

Rodriguez, Paul L (Department: 2123)

Data processing: structural design, modeling, simulation, and em

Simulating electronic device or electrical system

Circuit simulation

C717S135000, C717S136000, C716S030000

Reexamination Certificate

active

07835899

ABSTRACT:
According to a method of simulation processing, a collection of files including one or more HDL source files describing design entities collectively representing a digital design to be simulated is received. The HDL source file(s) include a statement specifying inclusion of an instrumentation entity not forming a portion of the digital design but enabling observation of its operation during simulation. The instrumentation entity includes sequential logic containing at least one storage element, where the instrumentation entity has an output signal indicative of occurrence of a simulation event. The collection of files is processed to obtain an instrumented simulation executable model. The processing includes instantiating at least one instance of each of the plurality of design entities and instantiating the instrumentation entity. The processing further includes instantiating external instrumentation logic, logically coupled to each instance of the instrumentation entity, to record occurrences of the event.

REFERENCES:
patent: 2003/0131325 (2003-07-01), Schubert et al.
patent: 2003/0188299 (2003-10-01), Broughton et al.

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