Layout-driven, area-constrained design optimization
Layouts with routes with different spacings in different...
Layouts with routes with different widths in different...
Lazy symbolic model checking
LCR extraction method and computer program for performing...
Leadframe tip arrangement designing method
Leakage control in integrated circuits
Leakage current analyzing apparatus, leakage current...
Leakage current reduction in standard cells
Leakage power optimization for integrated circuits
Legalization of VLSI circuit placement with blockages using...
Length matrix generator for register transfer level code
Leveraging combinations of synthesis, placement and...
Library creating device and interconnect capacitance...
Library for storing pattern shape of connecting terminal and...
Library for use in designing a semiconductor device
Light intensity simulation method, program product, and...
Line path determining method and delay estimating method
Line width check in layout database
Line width check in layout database