Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Analysis and verification
Reexamination Certificate
2008-09-03
2011-12-06
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Design of semiconductor mask or reticle
Analysis and verification
C716S112000, C716S136000
Reexamination Certificate
active
08074186
ABSTRACT:
A leakage current analyzing apparatus receives input of data used for analysis and indicating intra/inter-chip variation concerning the gate length of transistors constituting cells in a circuit to be designed, where the inter-chip variation is handled as a discrete probability density distribution R. Using the data input, the leakage current analyzing apparatus obtains a cumulative probability density for a leakage current value (of the circuit) that is equal to or less than each arbitrary leakage current value I1to IJ. As a result, the leak rate of the circuit to be designed can be correctly obtained without limiting the shape of distribution.
REFERENCES:
patent: 7934182 (2011-04-01), Nitta et al.
patent: 2004/0254776 (2004-12-01), Andou
patent: A 2003-316849 (2003-11-01), None
Rajeev Rao, et al., “Statistical Analysis of Subthreshold Leakage Current for VLSI Circuits.” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 12, No. 2, Feb. 2004, pp. 131-139.
Fujitsu Limited
Greer Burns & Crain Ltd.
Siek Vuthe
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