Efficient fabrication process for dual well type structures
Efficient generation of optimum test data
Efficient implementation of multiple clock domain accesses...
Efficient integrated circuit layout for improved matching...
Efficient iterative, gridless, cost-based fine router for...
Efficient layout strategy for automated design layout tools
Efficient method to predict integrated circuit temperature...
Efficient model order reduction via multi-point moment matching
Efficient pipelining of synthesized synchronous circuits
Efficient power analysis method for logic cells with many...
Efficient routing of conductors between datapaths
Efficient SAT-based unbounded symbolic model checking
Efficient statistical timing analysis of circuits
Efficient statistical timing analysis of circuits
Efficient system for multi-level shape interactions
Efficient timing graph update for dynamic netlist changes
Efficient top-down characterization method
Efficient tracing of shorts in very large nets in...
Efficient tracing of shorts in very large nets in...
Eigen decomposition based OPC model