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Wafer scale fiber optic termination

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Reexamination Certificate

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Wafer scale integrated circuit and method of forming signal prop

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
Patent

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Wafer scale of full wafer memory system, packaging method thereo

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices
Patent

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Wafer scale optoelectronic package

Active solid-state devices (e.g. – transistors – solid-state diode – Incoherent light emitter structure – In combination with or also constituting light responsive...
Patent

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Wafer scale or full wafer memory system, packaging method thereo

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent

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Wafer scale package and method of assembly

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With large area flexible electrodes in press contact with...
Reexamination Certificate

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Wafer scale packaging scheme

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate

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Wafer scale processing

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Amorphous semiconductor material
Reexamination Certificate

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Wafer scale semiconductor structure

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate

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Wafer scale thin film package

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate

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Wafer sheet with adhesive on both sides and attached...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Die bond
Reexamination Certificate

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Wafer stacked package having vertical heat emission path and...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With provision for cooling the housing or its contents
Reexamination Certificate

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Wafer stacked package waving bertical heat emission path and...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With provision for cooling the housing or its contents
Reexamination Certificate

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Wafer stacking using interconnect structures of...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Die bond
Reexamination Certificate

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Wafer stacking with anisotropic conductive adhesive

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Die bond
Reexamination Certificate

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Wafer street buffer layer

Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With peripheral feature due to separation of smaller...
Reexamination Certificate

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Wafer street buffer layer

Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With peripheral feature due to separation of smaller...
Reexamination Certificate

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Wafer structure

Active solid-state devices (e.g. – transistors – solid-state diode – With shielding
Reexamination Certificate

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Wafer structure in a semiconductor device manufacturing process

Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks
Patent

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Wafer structure with discrete gettering material

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With desiccant – getter – or gas filling
Reexamination Certificate

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