Charge-trapping semiconductor memory device
Charged device model electrostatic discharge protection for...
Checkerboarded high-voltage vertical transistor layout
Chemical vapor deposition of PB5GE3O11 thin film for...
Chemoreceptive semiconductor structure
Chimney capacitor
Chip decoupling capacitor
Chip scale package
Chip structure to improve resistance-capacitance delay and...
Circuit and method for a folded bit line memory cell with vertic
Circuit and method for a folded bit line memory cell with...
Circuit and method for a folded bit line memory using trench pla
Circuit and method for a memory cell using reverse base current
Circuit and method for an integrated charged device model clamp
Circuit and method for an open bit line memory cell with a verti
Circuit and method for an open bit line memory cell with a...
Circuit and method for an open bit line memory cell with a...
Circuit and method for forming a non-volatile memory cell
Circuit and method for gate-body structures in CMOS technology
Circuit and method for gate-body structures in CMOS technology