Circuit and method for a memory cell using reverse base current

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257390, 257 69, 257903, 257273, 257133, 257146, 257500, 257501, 257506, 257510, 257524, H01L 31062, H01L 2980, H01L 2900

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060722231

ABSTRACT:
A memory cell is provided. The memory cell includes a field-effect transistor having a source region, a drain region and a gate coupled to a wordline. The memory cell also includes a vertical bipolar junction transistor that is biased for use of the reverse base current effect to store data. The bipolar junction transistor has an emitter region formed within a source/drain region of the field-effect transistor. The emitter region is self-aligned with a minimum dimension isolation region adjacent to the memory cell and is coupled to a ground line. A portion of the source/drain region acts as the base of the bipolar junction transistor.

REFERENCES:
patent: 5554870 (1996-09-01), Fitch et al.
patent: 5717241 (1998-02-01), Malhi et al.
Sakui, K., et al., "A New Static Memory Cell Based on Reverse Base Current (RBC) Effect of Bipolar Transistor" International Electron Devices Meeting. Technical Digest (IEEE Cat. No. 88CH2528-8., San Francisco, CA, 44-47, Dec. 1988.

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