Search
Selected: All

Cavity chip package

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Cavity chip package

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Cavity down ball grid array (CD BGA) package

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Cavity down ball grid array package structure and carrier...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Cavity down HBGA package structure

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Cavity grid array integrated circuit package

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Cavity-down ball grid array package with semiconductor chip...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Center bond flip-chip semiconductor device and method of...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Ceramic substrate having pads to be attached to terminal members

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Ceramic-to-conducting-lead hermetic seal

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Ceramics for wiring boards and method of producing the same

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Wire contact – lead – or bond
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Characterization of induced shift on an overlay target using...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Check pattern for via-hole opening examination

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Chemical leadframe roughening process and resulting...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – With textured surface
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Chemical vapor deposition of titanium

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Chemical vapor deposition of titanium

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Chip and wafer integration process using vertical connections

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Chip arrangement and method of manufacturing a chip arrangement

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Chip bond layout for chip carrier for flip chip applications

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Chip capacitive coupling

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0
  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.