Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate
2008-03-04
2008-03-04
Clark, S. V. (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Flip chip
C257S686000, C438S108000, C438S107000
Reexamination Certificate
active
11536635
ABSTRACT:
A package for an IC includes a carrier with a cavity formed on one of the major surfaces. Bumps of a semiconductor die are mated to contact pads located on the bottom of the cavity. The die is attached to the major surface of the carrier. The major surface creates a support which securely holds the chip in place with adhesive for assembly.
REFERENCES:
patent: 6469376 (2002-10-01), Vaiyapuri
patent: 6659512 (2003-12-01), Harper et al.
patent: 6674159 (2004-01-01), Peterson et al.
patent: 2005/0285254 (2005-12-01), Buot et al.
Iksan Henry
Kim Seong Kwang Brandon
Sun Yi Sheng Anthony
Tan Hien Boon
Tanary Susanto
Horizon IP Pte. Ltd.
United Test and Assembly Center Ltd.
LandOfFree
Cavity chip package does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Cavity chip package, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Cavity chip package will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3942753