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One-transistor memory cell for large scale integration dynamic s

Static information storage and retrieval – Magnetic bubbles – Guide structure
Patent

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One-transistor memory cell with enhanced capacitance

Static information storage and retrieval – Magnetic bubbles – Guide structure
Patent

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One-transistor type dram

Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate

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One-transistor type DRAM

Static information storage and retrieval – Read/write circuit – Including specified plural element logic arrangement
Reexamination Certificate

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One-transistor type DRAM

Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate

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One-transistor type DRAM

Static information storage and retrieval – Read/write circuit – Signals
Reexamination Certificate

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One-transistor, one-resistor, one-capacitor phase change memory

Static information storage and retrieval – Systems using particular element – Resistive
Reexamination Certificate

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OP amp circuit with variable resistance and memory system includ

Static information storage and retrieval – Read/write circuit – Differential sensing
Patent

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Op amp circuit with variable resistance and memory system includ

Static information storage and retrieval – Read/write circuit – Differential sensing
Patent

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Open bit line memory devices and operational method

Static information storage and retrieval – Read/write circuit – Noise suppression
Patent

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Open circuit potential amperometry and voltammetry

Static information storage and retrieval – Systems using particular element – Molecular or atomic
Reexamination Certificate

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Open digit line array architecture for a memory array

Static information storage and retrieval – Read/write circuit – Flip-flop used for sensing
Reexamination Certificate

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Open digit line array architecture for a memory array

Static information storage and retrieval – Read/write circuit – Flip-flop used for sensing
Reexamination Certificate

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Open digit line array architecture for a memory array

Static information storage and retrieval – Read/write circuit – Flip-flop used for sensing
Reexamination Certificate

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Open digit line array architecture for a memory array

Static information storage and retrieval – Interconnection arrangements
Reexamination Certificate

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Operable synchronous semiconductor memory device switching...

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Operable synchronous semiconductor memory device switching...

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Operable synchronous semiconductor memory device switching...

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Operating a non-volatile memory device

Static information storage and retrieval – Floating gate
Reexamination Certificate

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Operating a storage component

Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate

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