One-transistor memory cell for large scale integration dynamic s

Details One-transistor memory cell for large scale integration dynamic s One-transistor memory cell for large scale integration dynamic s

1985-01-14

1988-05-24

James, Andrew J.

Static information storage and retrieval

Magnetic bubbles

Guide structure

357 4, 357 59, 365182, 365186, H01L 2978, H01L 2904, G11C 1134

Patent

active

047469595

ABSTRACT:
A one-transistor memory cell comprises a semiconductor body which has a thin insulating layer on a boundary surface and a conductive layer on the thin insulating layer, the conductive layer representing that electrode of a storage capacitor that is connected to a selection field effect transistor. The selection field effect transistor is realized in a layer applied as a polycrystalline semiconductor layer and is then recrystallized. The memory cell provides the smallest possible semiconductor surface. This is achieved in that the recrystallized semiconductor layer is disposed above the conductive layer 3 and is separated therefrom by an intermediate insulating layer, whereby it extends in the lateral direction, at most, up to the edge of the semiconductor layer 3.

REFERENCES:
patent: 4536785 (1985-08-01), Gibbons
Sturm et al., IEEE Elec. Dev. Lttrs. vol. EDL-5, No. 5, May 1984, "A Three-Dimensional . . . Polysilicon", pp. 151-153.
Kamins, T. I., "MOS Transistors in Beam Re-Crystallized Polysilicon", IEDM 82, pp. 420-423.
Jolly et al., "A New Dynamic RAM Cell in Recrystallized Polysilicon", IDEM 82, pp. 803-805.
Lee et al., "Thin Film MOSFET's Fabricated in Laser-Annealed Polycrystalline Silicon", Appl. Phys. Lett., Jul. 15, 1979, vol. 35, No. 2, pp. 173-175.
Benevit et al., "A 256K Dynamic Random Access Memory", J. of Solid State Circuits, Oct. 1982, vol. SC-17, No. 5, pp. 857-861.

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