OP amp circuit with variable resistance and memory system includ

Details OP amp circuit with variable resistance and memory system includ OP amp circuit with variable resistance and memory system includ

1996-05-01

1997-12-02

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Differential sensing

365208, 330282, 330 86, G11C 702, H03G 312

Patent

active

056943660

ABSTRACT:
An operational amplifier-based voltage multiplier circuit ("op amp circuit") implemented as an integrated circuit, and a memory chip including such an op amp circuit. The op amp circuit includes a variable operational feedback or input resistance (or a variable operational feedback resistance and a variable input resistance), and preferably also circuitry for controlling at least one variable resistance in response to control bits to cause the op amp circuit to assert a selected output voltage in response to a given input voltage. Preferably, each set of control bits determines a binary control word whose binary value has a simple functional relation to the value of the output voltage selected thereby. Preferably, the memory chip includes an array of memory cells (e.g, flash memory cells) and a control unit for controlling memory operations including programming, reading, and erasing the memory cells. The op amp circuit outputs each selected output voltage in response to a different binary control word asserted by the control unit. Each binary control word is preferably determined by a set of control bits whose binary value has a simple functional relation to the value of the output voltage selected thereby. The memory chip preferably includes non-volatile data storage units which store bits of the binary control words.

REFERENCES:
patent: 5387879 (1995-02-01), Satoh
patent: 5487045 (1996-01-01), Trodden
patent: 5523721 (1996-06-01), Segawa
patent: 5579274 (1996-11-01), Van Buskirk
patent: 5581213 (1996-12-01), Linder

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