Current leakage reduction for loaded bit-lines in on-chip...
Current leakage reduction for loaded bit-lines in on-chip...
Current leakage reduction for loaded bit-lines in on-chip...
Current leakage reduction for loaded bit-lines in on-chip...
Current-mode write-circuit of a static ram
Data holding device and data holding method
Data retention circuit and semiconductor memory device using the
Data retention circuit and semiconductor memory device using the
Data shifting through scan registers
Deglitching circuits for a radiation-hardened static random...
Deglitching circuits for a radiation-hardened static random...
Deglitching circuits for a radiation-hardened static random...
Deglitching circuits for a radiation-hardened static random...
Depletion-mode MOSFET circuit and applications
Design concept for SRAM read margin
Design structure for SRAM active write assist for improved...
Digital memory with reset/preset capabilities
Distributed decode system and method for improving static...
Double-edged clocked storage device and method
Double-ended memory cell array using interleaved bit lines and m