Design concept for SRAM read margin

Details Design concept for SRAM read margin Design concept for SRAM read margin

2005-05-10

2005-05-10

Hoang, Huan (Department: 2818)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S156000, C365S230060, C365S226000

Reexamination Certificate

active

06891745

ABSTRACT:
A new method to improve the reading margin in a SRAM memory array is achieved. The method comprises providing an array of SRAM cells. Each SRAM cell has a power supply terminal. A first voltage is forced on the power supply terminal of a first SRAM cell that is selected for reading. A second voltage is forced on the power supply terminal of a second SRAM cell that is not selected for reading. The first voltage does not equal the second voltage. A new SRAM device featuring this method is disclosed.

REFERENCES:
patent: 5726932 (1998-03-01), Lee et al.
patent: 5757696 (1998-05-01), Matsuo et al.
patent: 6157558 (2000-12-01), Wong
patent: 6266269 (2001-07-01), Karp et al.
patent: 6683805 (2004-01-01), Joshi et al.
patent: 20020186581 (2002-12-01), Yamaoka et al.

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