Simple amplifying system for a dense memory array

Simultaneous read-write IGFET memory cell

Single channel four transistor SRAM

Single ended dual port memory cell

Single ended dual port memory cell

Single ended simpler dual port memory cell

Single ended simplex dual port memory cell

Single ended two-stage memory cell

Single event upset (SEU) hardened latch circuit

Single event upset (SEU) hardened static random access...

Single event upset hardened CMOS latch circuit

Single event upset hardened memory cell

Single event upset hardening CMOS memory circuit

Single event upset in SRAM cells in FPGAs with leaky gate...

Single event upset tolerant memory cell layout

Single rail CMOS register array and sense amplifier circuit ther

Single-ended memory cell with improved read stability and...

Single-ended read and differential write scheme

Single-ended read, dual-ended write SCRAM cell

Single-event upset immune static random access memory cell...