Programmable DQS preamble
Programmable logic device with a double data rate SDRAM...
Programmable memory access parameters
Programmable sense amplifier delay (PSAD) circuit which is match
Programmable sense amplifier timing generator
Programming sequence for electrically programmable memory
PROM with built-in JTAG capability for configuring FPGAs
Propagation delay independent SDRAM data capture device and...
Pseudo-static memory subsystem
Pulse width adjusting circuit for use in semiconductor...
PVT self aligning internal delay line and method of operation
Qualified data strobe signal for double data rate memory...
Radio frequency powered voltage pump for programming EEPROM
Radio paging receiver
RAM macro and timing generating circuit thereof
Random access memory including selective activation of...
Random access memory with post-amble data strobe signal...
Randomizing current consumption in memory devices
Randomizing current consumption in memory devices
RAS input disable circuit