PROM with built-in JTAG capability for configuring FPGAs

Details PROM with built-in JTAG capability for configuring FPGAs PROM with built-in JTAG capability for configuring FPGAs

1999-02-04

2000-03-28

Nelms, David

Static information storage and retrieval

Read/write circuit

Signals

365201, 395280, 371 223, G11C 700

Patent

active

060440252

ABSTRACT:
The invention provides a structure and method for configuring an FPGA from a PROM using a boundary scan chain. A PROM is provided that comprises JTAG circuitry. Configuration data is stored in the PROM memory as in known PROMs. When the data is retrieved from the PROM memory it is provided on a standard JTAG Test Access Port (TAP). The JTAG-compatible PROM is included as part of a JTAG scan chain, preferably directly preceding the FPGA to be configured by the PROM. The PROM can be controlled either externally or via JTAG commands received down the scan chain. Therefore, a reconfiguration of the FPGA can be initiated via standard JTAG commands. In one embodiment, the PROM itself is programmed with the FPGA configuration data using the JTAG TAP port.

REFERENCES:
patent: 5694399 (1997-12-01), Jacobson et al.
patent: 5793987 (1998-08-01), Quackenbush et al.
"The Programmable Logic Data Book" copyright 1994, pp. 2-32 through 2-45 and 8-45 through 8-52, Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124.

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