Process monitoring by comparing delays proportional to test...

Programmable control block for dual port SRAM application

Programmable control block for dual port SRAM application

Programmable data strobe enable architecture for DDR memory...

Programmable data strobe enable architecture for DDR memory...

Programmable delay circuit within a content addressable memory

Programmable delay circuit within a content addressable memory

Programmable delay control for sense amplifiers in a memory

Programmable delay control for sense amplifiers in a memory

Programmable DQS preamble

Programmable DQS preamble

Programmable logic device with a double data rate SDRAM...

Programmable memory access parameters

Programmable sense amplifier delay (PSAD) circuit which is match

Programmable sense amplifier timing generator

Programming sequence for electrically programmable memory

PROM with built-in JTAG capability for configuring FPGAs

Propagation delay independent SDRAM data capture device and...

Pseudo-static memory subsystem

Pulse width adjusting circuit for use in semiconductor...