Process monitoring by comparing delays proportional to test...

Details Process monitoring by comparing delays proportional to test... Process monitoring by comparing delays proportional to test...

2007-11-20

2007-11-20

Elms, Richard T. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Signals

C365S201000, C365S189050

Reexamination Certificate

active

10836753

ABSTRACT:
An evaluation circuit includes a test circuit configured to provide a test voltage indicative of a characteristic of a semiconductor device, a reference circuit configured to provide a first reference voltage, a first delay circuit configured to convert the test voltage into a first delay, a second delay circuit configured to convert the first reference voltage into a second delay, and a first latching circuit configured to determine a relationship between the first delay and the second delay.

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patent: 2007/0132443 (2007-06-01), LaBerge

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