Large-scale integrated circuit device such as a wafer scale memo

Details Large-scale integrated circuit device such as a wafer scale memo Large-scale integrated circuit device such as a wafer scale memo

1989-08-09

1992-01-28

Bowler, Alyssa H.

Static information storage and retrieval

Interconnection arrangements

365 51, 365174, 365200, G11C 512, G11C 502

Patent

active

050848380

ABSTRACT:
A plurality of unit integrated circuits mounted on a large-scale integrated circuit device, for example, a wafer scale memory, are each provided with a bypass circuit which selectively shorts input and output nodes in the corresponding unit integrated circuit. By selectively bringing the bypass circuit into a transfer state, it is possible to effectively couple together all unit integrated circuits which are judged to be normal among a plurality of unit integrated circuits disposed along one row, for example. Improved redundancy arrangements are also provided, including first and second redundant elements for the unit integrated circuits, to effectively utilize the normal elements in the unit integrated circuits. Further, an improved arrangement for hierarchically connecting together the outputs of all the unit circuit blocks is provided which reduces the signal line load for the memory device.

REFERENCES:
patent: 4791607 (1988-12-01), Igarashi et al.
IEEE Proceedings, vol. 74, No. 12, Dec. 1986, "Future Trends in Water Scale Integration", by Carlson et al.
Article-Electronics and Power, Apr. 1986, pp. 283-285, "Brighter Prospects for Water-Scale Integration", by Dettmer.

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