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Structure and method for integrating MIM capacitor in BEOL...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Structure and method for latchup improvement using through...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Structure and method for manufacturing asymmetric devices

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Structure and method for manufacturing MOSFET with...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Structure and method for manufacturing strained FINFET

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Structure and method for manufacturing strained FINFET

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Structure and method for mosfet with reduced extension...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Structure and method for planar MOSFET DRAM cell free of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Structure and method for reducing miller capacitance in...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Structure and method for suppressing oxide encroachment in a...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Structure and method of a strained channel transistor and a...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Structure and method of fabricating a hybrid substrate for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Structure and method of fabricating a hybrid substrate for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Structure and method of fabricating a hybrid substrate for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Structure and method of fabricating embedded vertical DRAM...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Structure and method of fabricating FinFET

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Structure and method of forming bitline contacts for a...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Structure and method of MOS transistor having increased...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Structure and method to control oxidation in high-k gate...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Structure and method to fabricate MOSFET with short gate

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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