Dual-damascene process with porous low-K dielectric material
Dual-level metalization method for integrated circuit ferroelect
Dual-rie structure for via/line interconnections
Dual-sided semiconductor chip and method for forming the...
Dual-sided semiconductor device and method of forming the...
Dummy fill patterns to improve interconnect planarity
Dummy metal pattern method and apparatus
Dummy patterns for aluminum chemical polishing (CMP)
Dummy patterns for aluminum chemical polishing (CMP)
Dynamic Schottky barrier MOSFET device and method of...
Dynamically controllable reduction of vertical contact...
E-beam deposition method and apparatus for providing high...
E-beam direct writing to pattern step profiles of dielectric...
Edge and bevel cleaning process and system
Edge seal for a semiconductor device
Edge termination in MOS transistors
EEPROM device having improved data retention and process for...
Effective diffusion barrier process and device manufactured...
Effective retardation of fluorine radical attack on metal...
Efficient and economical method of planarization of multilevel m