Dual-level metalization method for integrated circuit ferroelect

Details Dual-level metalization method for integrated circuit ferroelect Dual-level metalization method for integrated circuit ferroelect

1997-05-09

1999-05-11

Everhart, Caridad

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438 3, 438240, 438253, H01L21/44

Patent

active

059021314

ABSTRACT:
A dual-level metalization method for ferroelectric integrated circuits includes the steps forming a planarized oxide layer over a partially formed integrated circuit ferroelectric device, forming a cap layer over the planarized oxide layer, forming vias into the planarized oxide layer and cap layer to provide access to the desired first-level metal contacts, and metalizing the selected first-level metal contacts with second-level metal. The cap layer can be doped or undoped titanates, zirconates, niobates, tantalates, stanates, hafnates, or manganates such as doped and undoped PZT (lead zirconate titanate), BST (barium strontium titanate), or SBT (strontium bismuth tantalate).

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