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High-speed failure capture apparatus and method for...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate

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High-speed first-in-first-out buffer

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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High-speed level sensitive scan design test scheme with...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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High-speed module, device and method for decoding a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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High-speed programming of memory devices

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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High-speed redundant disk controller methods and systems

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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High-speed semiconductor memory test device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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High-speed serial transfer device test data storage medium...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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High-speed serial transfer device test method, program, and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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High-speed syndrome calculation

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Patent

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High-speed syndrome calculation

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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High-speed test system for a memory device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Patent

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High-speed turbo decoder

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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High-throughput memory-efficient BI-SOVA decoder architecture

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Higher radix Log MAP processor

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Highly available cluster message passing facility

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Highly available cluster message passing facility

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Highly available cluster virtual disk system

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent

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Highly available TCP systems with fail over connections

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Highly available transaction processing

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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