Algorithm to test LPAR I/O subsystem's adherence to LPAR I/O...
Algorithmic pattern generator
Algorithmic pattern generator for integrated circuit tester
Algorithmic test pattern generator, with built-in-self-test...
Algorithmically programmable memory tester with breakpoint...
Algorithmically programmable memory tester with history...
Algorithmically programmable memory tester with test sites...
Alignment of recovered clock with data signal
Allocating data bursts and supporting hybrid auto...
Allocation of sparing resources in a magnetoresistive...
Almost full-scan BIST method and system having higher fault...
Altering a degree of redundancy used during execution of an...
Altering bit sequences to contain predetermined patterns
Alternate fault handler
Alternate port apparatus for manufacturing test of...
Alternate routing of management message to simplified network el
Alternating current built in self test (AC BIST) with...
Alternative path control system and method
Ameliorating the adverse impact of burst errors on the...
Amplifying magnitude metric of received signals during...