Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
1999-02-17
2003-11-25
Beausoliel, Robert (Department: 2184)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C370S241000
Reexamination Certificate
active
06654913
ABSTRACT:
TECHNICAL FIELD
The present invention relates in general to data processing systems, and in particular, to a manufacturing test of serial bus functionality in a data processing system.
BACKGROUND INFORMATION
During the manufacture of a data processing system, it is desirable to test the subassemblies on the “planar card,” or motherboard. For example, tests may need to be performed on a chip set interfacing the central processing unit (CPU). However, testing of certain subsystems may require that different operating systems be loaded to effect testing of the subsystem.
For example, in a data processing system having an integrated Universal Serial Bus (USB) hub on the motherboard, testing of the USB subsystem may require loading of an operating system such as Windows, having the capability to support USB test programming when the remaining subsystems such as the CPU, memory and traditional I/O test programming runs under DOS. This is time consuming, and increases testing costs.
Thus, there is a need in the art for an apparatus and method to independently test subsystems on a planar card. In this way, subsystems, such as a USB subsystem could be tested concurrently with the CPU, memory, and traditional I/O, thereby speeding up the testing process with a concomitant reduction in testing cost.
SUMMARY OF THE INVENTION
The aforementioned needs are addressed by the present invention. Accordingly there is provided, in a first form, a data processing system including a serial bus interface. The bus interface is operable for coupling serial data signals to one or more peripheral serial devices. Switching circuitry is coupled to the serial bus interface, wherein the switching circuitry is operable for communicating serial data signals between the serial data interface and first and second serial data transceiving units in response to a control signal.
There is also provided, in a second form, a method for integrated serial bus testing in a data processing system. The method includes the step of switching a first serial data transceiving unit to a serial bus interface in response to a control signal having a first data value. Additionally, the method constitutes switching a second serial transceiving unit to the serial bus interface in response to the control signal having a second data value, wherein the second serial transceiving unit is adapted for coupling to the data processing system via an input/output (I/O) device port.
The foregoing has outlined rather broadly the features and technical advantages of the present invention in order that the detailed description of the invention that follows may be better understood. Additional features and advantages of the invention will be described hereinafter which form the subject of the claims of the invention.
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Microsoft Press Computer Dictionary, Copyright 1997, Third Edition pp. 239 and 455.
Beausoliel Robert
International Business Machines - Corporation
Maskulinski Michael
Schelkopf J. Bruce
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