Page boundary detector

Electronic digital logic circuitry – Multifunctional or programmable – Having details of setting or programming of interconnections...

Reexamination Certificate

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Details

C715S252000

Reexamination Certificate

active

07061267

ABSTRACT:
A logical gate and a comparator are used to detect page boundaries in a data stream. A current address and a predetermined page size, that is an integer power of 2, are compared using a Boolean logic gate such as AND or XOR to detect a page boundary in a data stream. The output from the Boolean logic gate is compared to a predetermined value to cause a signal to be generated, indicating the end of the page.

REFERENCES:
patent: 4406537 (1983-09-01), Mori
patent: 4717967 (1988-01-01), Yoshida
patent: 4908672 (1990-03-01), Ito
patent: 6181432 (2001-01-01), Furuya
Mano, Morris, Degital Design, 1984, Prentice Hall INC., pp. 145-146.

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