Gate oxide voltage limiting devices for digital circuits

Gate structures with reduced propagation-delay variations

Gate-clocked domino circuits with reduced leakage current

Gated scan output flip-flop

Gating logic circuits in a self-timed integrated circuit

General purpose delay logic

General purpose delay logic

General purpose delay logic

General purpose input/output system and method

General-purpose logic array and ASIC using the same

General-purpose logic cell, general-purpose logic cell array...

General-purpose logic module and cell using the same

General-purpose logic module and cell using the same

Generalized push-pull cascode logic technique

Gigabit router on a single programmable logic device

Glitch free clock multiplexer circuit and method thereof

Glitch reduced compensated circuits and methods for using such

Glitch removal circuitry

Glitch-eliminator circuit

Glitch-free clock enable circuit