Programmable logic device architecture with multiple slice...
Programmable logic device architecture with multiple slice...
Programmable logic device architecture with super-regions...
Programmable logic device architecture with the ability to...
Programmable logic device architecture with the ability to...
Programmable logic device architectures
Programmable logic device architectures and methods for...
Programmable logic device architectures with super-regions...
Programmable logic device architectures with super-regions...
Programmable logic device capable of preserving state data...
Programmable logic device capable of preserving user data...
Programmable logic device circuitry for improving multiplier spe
Programmable logic device circuitry for improving multiplier...
Programmable logic device configuration via device...
Programmable logic device configured to accommodate...
Programmable logic device having a composable memory array...
Programmable logic device having a configurable DRAM with...
Programmable logic device having a programmable selector...
Programmable logic device having an embedded differential...
Programmable logic device having combinational logic at inputs t