High speed, low noise output buffer with non-identical pairs of
High speed, low power macrocell
High throughput FPGA control interface
High-bandwidth interconnect network for an integrated circuit
High-density erasable programmable logic device architecture usi
High-density erasable programmable logic device architecture usi
High-density erasable programmable logic device architecture usi
High-density programmable logic device with flexible local...
High-performance interconnect
High-performance interconnect
High-performance programmable logic architecture
High-performance programmable logic architecture
High-speed lookup table circuits and methods for...
High-speed programmable interconnect
High-speed programmable interconnect
High-speed programmable logic architecture having active...
Hotsocket-compatible body bias circuitry with power-up...
Hybrid configurable circuit for a configurable IC
Hybrid interconnect/logic circuits enabling efficient...
Hybrid logic/interconnect circuit in a configurable IC