Restructuring data from a trace buffer of a configurable IC

Robot crash protector

Routing architecture for a programmable logic device

Routing architecture for a programmable logic device

Routing architecture using a direct connect routing mesh

Routing architecture with high speed I/O bypass path

Routing connections for programmable logic array integrated circ

Routing in programmable logic devices using shared distributed p

Routing resources for hierarchical FPGA

Routing structures for a tileable field-programmable gate...

Runtime loading of configuration data in a configurable IC

Sample and load scheme for observability of internal nodes in a

Scalable architecture for high density CPLD's having...

Scalable architecture for high density CPLDS having...

Scalable complex programmable logic device with segmented...

Scalable multiple level tab oriented interconnect architecture

Scalable non-blocking switching network for programmable logic

Scalable non-blocking switching network for programmable logic

Scalable non-blocking switching network for programmable logic

Scalable non-blocking switching network for programmable logic