LandOfFree - US Patents - Listing for Electronic digital logic circuitry,Clocking or synchronizing of logic stages or gates

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor

Method and apparatus for implementing an adiabatic logic family

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates

Method and apparatus for implementing balanced clock...

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor

Method and apparatus for implementing subthreshold leakage...

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates

Method and apparatus for improving signal noise immunity in...

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor

Method and apparatus for leakage current reduction

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates

Method and apparatus for locating and improving critical speed p

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates

Method and apparatus for locating and improving race conditions

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates

Method and apparatus for locating data transition regions

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates

Method and apparatus for logic circuit transition detection

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates

Method and apparatus for logic synchronization

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates

Method and apparatus for logic synchronization

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates

Method and apparatus for reducing clock enable setup time in...

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates

Method and apparatus for reducing clock-data skew by clock shift

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor

Method and apparatus for reducing leakage in dynamic...

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor

Method and apparatus for reducing power consumption in a domino

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates

Method and apparatus for reducing power consumption in digital e

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates

Method and apparatus for reducing power consumption in digital e

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor

Method and apparatus for reducing skew between input signals and

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor

Method and apparatus for reducing soft errors in dynamic...