Pipelined processor method and circuit with interleaving of...

Pipelined processor with microcontrol of register translation ha

Pipelined processor with multi-cycle grouping for...

Pipelined two-cycle branch target address cache

Pipelined, superscalar floating point unit having...

Pipelined, superscalar floating point unit having...

Piping rounding mode bits with floating point instructions...

Placing a processor into a gradual slow mode of operation in...

Placing front instruction in replay loop to front to place...

Planar cache layout and instruction stream therefor

Plural microcontrollers for managing CPU allocation and...

Plural SIMD arrays processing threads fetched in parallel...

Polymorphous computing fabric

Pop-compare micro instruction for repeat string operations

Portable memory drive with portable applications and...

Portable processing device having a modem selectively...

Power connectors, antenna connectors and telephone line connecto

Power consumption reduction in a pipeline by stalling...

Power down system and method for pipelined logic functions

Power optimized replay of blocked operations in a pipilined...