Hardware loops
Hardware loops
Hardware loops
Hardware loops and pipeline system using advanced generation...
Hardware predication for conditional instruction path branching
Hardware predication for conditional instruction path branching
Hardware resource having an optimistic policy and a...
Hardware stack having entries with a data portion and...
Hardware system for fetching mapped branch target...
Hardware/software system for instruction profiling and trace...
Hardware/software system for profiling instructions and...
Hashing a target address for a memory access instruction in...
Heterogeneous multi-core processor having dedicated...
Heterogeneous multi-processor reference design
Heterogeneous parallel multithread processor (HPMT) with...
Hierarchical connection of plurality of functional units...
Hierarchical interconnect for configuring separate...
High and low power dual CPU cardiograph data processing...
High data density RISC processor
High frequency pipeline decoupling queue with non-overlapping re