Microprocessor with an instruction immediately next to a...

Microprocessor with branch target address cache update queue

Microprocessor with branch-decrement instruction that...

Microprocessor with circuits, systems and methods for...

Microprocessor with customer code store

Microprocessor with EIT, processing capability, and EIT...

Microprocessor with microinstruction-specifiable...

Microprocessor with rate of instruction operation dependent upon

Microsequencer with nested loop counters

Mixed execution stack and exception handling

Mixed execution stack and exception handling

Multi-level pattern history branch predictor using branch...

Multi-table branch prediction circuit for predicting a...

Multiple execution of instruction loops within a processor...

Multiple global pattern history tables for branch prediction in

Multiprocessor system having a plurality of control programs...

Multithread processor

Multithreading processor with thread predictor

N-wide add-compare-select instruction

Non-blocking, multi-context pipelined processor