Multithread processor

Details Multithread processor Multithread processor

2006-07-07

2008-11-04

Treat, William M (Department: 2181)

Electrical computers and digital processing systems: processing

Processing control

Branching

C712S215000

Reexamination Certificate

active

07447887

ABSTRACT:
To guarantee response time while strictly maintaining the priority specified by software, a processor (1) which is a multithread processor having a thread multiplexer (10), and an issue information buffer (ISINF). An instruction code, and issue information (isid) for instructions issued at and after the next operating cycle which is added to the instruction code, are supplied to the thread multiplexer. The issue information is valid from the second and subsequent instruction flows, and is saved temporarily in an issue information buffer. This issue information is for example the position of an operating cycle which can issue a high priority instruction, i.e., information showing a slot. The thread multiplexer issues a low priority instruction at another operating cycle at which a high priority instruction is not issued according to the issue information.

REFERENCES:
patent: 6105127 (2000-08-01), Kimura et al.
patent: 6253313 (2001-06-01), Morrison et al.
patent: 6976150 (2005-12-01), Uht et al.
patent: 2004/0216106 (2004-10-01), Kalla et al.
patent: 10-124316 (1998-05-01), None
patent: 2004-326766 (2004-11-01), None

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