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Circuit for synchronizing data transfers between two devices ope

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Patent

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Circuit for the management of memories in a multiple-user...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

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Circuit having relaxed setup time via reciprocal clock and...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate

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Circuit in a semiconductor memory for programming operation mode

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent

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Circuit, apparatus, and method for extracting multiple...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Circuit, system and method for encoding data to be stored on...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Circuitry and method for accessing an associative cache with...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Circuitry and method for relating first and second memory locati

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Addressing cache memories
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Circuits systems and methods for managing data requests between

Electrical computers and digital processing systems: memory – Address formation – Address mapping
Patent

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Circuits systems and methods for re-mapping memory row...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Circuits to generate a sequential index for an input number...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Circuits, systems and method for address mapping

Electrical computers and digital processing systems: memory – Address formation – Generating a particular pattern/sequence of addresses
Patent

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Circuits, systems, and methods for reducing microprogram memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Circular address register

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Circular addressing algorithms providing increased...

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
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Circular buffer control circuit and method of operation thereof

Electrical computers and digital processing systems: memory – Address formation – Operand address generation
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Circular buffer for processing audio samples

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Patent

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Circular buffer management

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
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Circular buffer with two different step sizes

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Circulator chain memory command and address bus topology

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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