Circular buffer with two different step sizes

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition

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711213, G06F 1200

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active

059241144

ABSTRACT:
A control unit (112) makes different judgments on the end address, depending on whether 1-word access or 2-word access, based on a post-update signal (507) and a 2-word access signal (508) which are internally generated and a coincidence signal (511) on the high-order 14 bits and another coincidence signal (512) on the bit 14 which are outputted from a comparator (158), and outputs a judgment result to a selector (155) as a selection signal (510). The selector (155) selects one of an output from an ALU (153) and an output from a latch (159) (the MOD.sub.-- S register 156) based on the selection signal (510). Having this structure, a data processor which enables access with modulo addressing in two different data-units can be provided.

REFERENCES:
patent: 4908748 (1990-03-01), Pathak et al.
patent: 5463749 (1995-10-01), Wertheizer et al.
patent: 5623621 (1997-04-01), Garde
U.S. Patent application Ser. No. 08/699,944 filed Aug. 20, 1996.
TMS320C54X User's Guide, Texas Instruments, 1995, pp. 7-22 to 7-25.
DSP1610 Architecture, Instruction Set, and Development Tools, Version 1.0, AT&T, 1992, pp. 7-29 to 7-33.

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