Search
Selected: M

Mechanism for handling conflicts in a multi-node computer...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Mechanism for handling explicit writeback in a cache...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Mechanism for handling explicit writeback in a cache...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Mechanism for handling I/O transactions with known...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Mechanism for high performance transfer of speculative...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Mechanism for incremental backup of on-line files

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Mechanism for initiating an implicit write-back in response...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Mechanism for invalidating instruction cache blocks in a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Mechanism for maintaining cache consistency in computer systems

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Mechanism for managing an object cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Mechanism for managing offset and aliasing conditions within a c

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Mechanism for on-the-fly handling of unaligned memory accesses

Electrical computers and digital processing systems: memory – Address formation – Slip control – misaligning – boundary alignment
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Mechanism for optimizing generation of commit-signals in a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Mechanism for performing loitering trace of objects that...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Mechanism for prefetching targets of memory de-reference operati

Electrical computers and digital processing systems: memory – Address formation – Generating prefetch – look-ahead – jump – or predictive address
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Mechanism for programmable modification of memory mapping...

Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Mechanism for providing early coherency detection to enable...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Mechanism for proxy management of multiprocessor storage...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Mechanism for proxy management of multiprocessor virtual memory

Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Mechanism for reducing latency of memory barrier operations on a

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0
  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.