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Optimized high bandwidth cache coherence mechanism

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Optimized high bandwidth cache coherence mechanism

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Optimized variable allocation method, optimized variable allocat

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Optimizing a cache eviction mechanism by selectively introducing

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Optimizing access to multiplexed data streams on a computer syst

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Optimizing compiler having data cache prefetch spreading

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Optimizing computer performance by using data compression...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Optimizing information lifecycle management for fixed storage

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Optimizing pipelined snoop processing

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Optimizing responses in a coherent distributed electronic system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Optionally pushing I/O data into a processor's cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Organization of an integrated cache unit for flexible usage in s

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Organization of dirty bits for a write-back cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Organization of dirty bits for a write-back cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Out-of-order memory transactions in a fine-grain...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Out-of-order snooping for multiprocessor computer systems

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Outboard file cache system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Output cache manager

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Output method and apparatus

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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