Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1993-12-23
1998-09-15
Swann, Tod R.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711 3, 711113, 711154, 711151, 707200, G06F 1202
Patent
active
058095276
ABSTRACT:
A system and method are described for caching files of data in a cache which is beyond the input/output boundary of a host. A host references a file with file access commands containing a logical file-identifier and a logical offset into the file. An outboard file cache coupled to the input/output section of the host receives the file access commands. The outboard file cache is transparent to users who program the host. Generation of input/output channel programs and mapping the data referenced to a physical address in secondary storage are eliminated when the referenced data is present in the cache. A file descriptor table in the outboard file cache identifies the logical portions of the logical files which are present in the cache. If the data referenced by the logical file-identifier and logical offset in a file access command is present in the outboard file cache, the data is transferred from the outboard file cache to the host memory. Otherwise, a miss status is returned to the host, and the host stages data from secondary storage to the outboard file cache. The outboard file cache further includes a lock table for storing file locks which inhibit access to selected files. In an outboard cache, excessive writes to a file are detected, the outboard cache having the first division for storage of selected portions of normal files, and a second division for storage of selected the second division is monitored and automatically converted to the first division when the storage used in the second division of cache memory falls below the periodic minimum.
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Cooper Thomas P.
Swenson Robert E.
Johnson Charles A.
Starr Mark T.
Swann Tod R.
Thai Tuan V.
Unisys Corporation
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