Optionally pushing I/O data into a processor's cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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Reexamination Certificate

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07574568

ABSTRACT:
A method, an apparatus and a system for a computing system implements a technique known as cache push that enhances a single writer invalidation protocol with the ability to optionally push data into another processor's cache without changing the memory consistency model being utilized by the method, apparatus and system.

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