Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2007-09-25
2007-09-25
Choi, Woo H. (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S160000
Reexamination Certificate
active
09945266
ABSTRACT:
An apparatus and method to de-allocate data in a cache memory is disclosed. Using a clock that has a predetermined number of periods, the invention provides a usage timeframe information to approximate the usage information. The de-allocation decisions can then be made based on the usage timeframe information.
REFERENCES:
patent: 3353430 (1967-11-01), Brackman et al.
patent: 4430712 (1984-02-01), Coulson et al.
patent: 4468730 (1984-08-01), Dodd et al.
patent: 4503501 (1985-03-01), Coulson et al.
patent: 4513392 (1985-04-01), Shenk
patent: 4536836 (1985-08-01), Dodd et al.
patent: 4908793 (1990-03-01), Yamagata et al.
patent: 4972364 (1990-11-01), Barrett et al.
patent: 5046043 (1991-09-01), Miller et al.
patent: 5070314 (1991-12-01), Decker
patent: 5133060 (1992-07-01), Weber et al.
patent: 5197895 (1993-03-01), Stupecky
patent: 5269019 (1993-12-01), Peterson et al.
patent: 5274799 (1993-12-01), Brant et al.
patent: 5347428 (1994-09-01), Carson et al.
patent: 5353430 (1994-10-01), Lautzenheiser
patent: 5386546 (1995-01-01), Hamaguchi
patent: 5442752 (1995-08-01), Styczinski
patent: 5444651 (1995-08-01), Yamamoto et al.
patent: 5466629 (1995-11-01), Mihara et al.
patent: 5499337 (1996-03-01), Gordon
patent: 5519831 (1996-05-01), Holzhammer
patent: 5526482 (1996-06-01), Stallmo et al.
patent: 5542066 (1996-07-01), Mattson et al.
patent: 5586291 (1996-12-01), Lasker et al.
patent: 5604881 (1997-02-01), Thomas
patent: 5606706 (1997-02-01), Takamoto et al.
patent: 5615353 (1997-03-01), Lautzenheiser
patent: 5619675 (1997-04-01), De Martine et al.
patent: 5636355 (1997-06-01), Ramakrishnan et al.
patent: 5701516 (1997-12-01), Cheng et al.
patent: 5761678 (1998-06-01), Bendert et al.
patent: 5764945 (1998-06-01), Ballard
patent: 5787296 (1998-07-01), Grimsrud et al.
patent: 5787466 (1998-07-01), Berliner
patent: 5806085 (1998-09-01), Berliner
patent: 5809337 (1998-09-01), Hannah et al.
patent: 5845313 (1998-12-01), Estakhri et al.
patent: 5860083 (1999-01-01), Sukegawa
patent: 5890205 (1999-03-01), Grimsrud et al.
patent: 5913224 (1999-06-01), MacDonald
patent: 5918244 (1999-06-01), Percival
patent: 5963721 (1999-10-01), Shiell et al.
patent: 5974508 (1999-10-01), Maheshwari
patent: 6012140 (2000-01-01), Thomason
patent: 6023713 (2000-02-01), Grimsrud et al.
patent: 6025618 (2000-02-01), Chen
patent: 6052789 (2000-04-01), Lin
patent: 6055180 (2000-04-01), Gudesen et al.
patent: 6064615 (2000-05-01), Gudesen
patent: 6072490 (2000-06-01), Bates et al.
patent: 6081883 (2000-06-01), Popelka et al.
patent: 6101574 (2000-08-01), Kumasawa et al.
patent: 6105111 (2000-08-01), Hammarlund et al.
patent: 6119118 (2000-09-01), Kain, III et al.
patent: 6122711 (2000-09-01), Mackenthun et al.
patent: 6157981 (2000-12-01), Blaner et al.
patent: 6165006 (2000-12-01), Yeh et al.
patent: 6175160 (2001-01-01), Paniccia et al.
patent: 6178479 (2001-01-01), Vishin
patent: 6209062 (2001-03-01), Boland et al.
patent: 6236586 (2001-05-01), Morisaki
patent: 6240416 (2001-05-01), Immon et al.
patent: 6263405 (2001-07-01), Irie et al.
patent: 6285626 (2001-09-01), Mizuno et al.
patent: 6295538 (2001-09-01), Cooper et al.
patent: 6295577 (2001-09-01), Anderson et al.
patent: 6298130 (2001-10-01), Galvin
patent: 6308168 (2001-10-01), Dovich et al.
patent: 6370614 (2002-04-01), Teoman et al.
patent: 6385697 (2002-05-01), Miyazaki
patent: 6389505 (2002-05-01), Emma et al.
patent: 6438647 (2002-08-01), Nielson et al.
patent: 6498744 (2002-12-01), Gudesen et al.
patent: 6502174 (2002-12-01), Beardsley et al.
patent: 6539456 (2003-03-01), Stewart
patent: 6564286 (2003-05-01), DaCosta
patent: 6662267 (2003-12-01), Stewart
patent: 6670659 (2003-12-01), Gudesen et al.
patent: 6725342 (2004-04-01), Coulson
patent: 6785767 (2004-08-01), Coulson
patent: 6829682 (2004-12-01), Kirihata et al.
patent: 6839812 (2005-01-01), Royer, Jr. et al.
patent: 6920533 (2005-07-01), Coulson et al.
patent: 6941423 (2005-09-01), Coulson
patent: 2002/0083264 (2002-06-01), Coulson
patent: 2002/0160116 (2002-10-01), Nordal et al.
patent: 2002/0199152 (2002-12-01), Garney et al.
patent: 2003/0001176 (2003-01-01), Li et al.
patent: 2003/0005219 (2003-01-01), Royer, Jr. et al.
patent: 2003/0005223 (2003-01-01), Coulson et al.
patent: 2003/0005233 (2003-01-01), Stewart et al.
patent: 2003/0023922 (2003-01-01), Davis et al.
patent: 2003/0046487 (2003-03-01), Swaminathan
patent: 2003/0061436 (2003-03-01), Royer, Jr. et al.
patent: 2003/0074524 (2003-04-01), Coulson
patent: 2003/0084239 (2003-05-01), Stewart
patent: 2003/0120868 (2003-06-01), Royer, Jr. et al.
patent: 2003/0188123 (2003-10-01), Royer, Jr. et al.
patent: 2003/0188251 (2003-10-01), Brown et al.
patent: 2004/0088481 (2004-05-01), Garney
patent: 2004/0162950 (2004-08-01), Coulson
patent: 2004/0225826 (2004-11-01), Royer, Jr. et al.
patent: 2004/0225835 (2004-11-01), Coulson
patent: 0210384 (1987-02-01), None
patent: 0702305 (1996-03-01), None
patent: 2210480 (1989-06-01), None
patent: 06236241 (1994-08-01), None
patent: WO93/21579 (1993-10-01), None
patent: WO 02/01364 (2002-01-01), None
patent: WO 02/01364 (2002-01-01), None
patent: WO 02/01365 (2002-01-01), None
patent: WO 02/01365 (2002-01-01), None
patent: WO 03/003202 (2003-01-01), None
patent: WO 03/003217 (2003-01-01), None
patent: WO 03/003217 (2003-01-01), None
patent: WO 03/034230 (2003-04-01), None
Pending, Royer et al., U.S. Appl. No. 09/895,578, filed Jun. 29, 2001.
Pending, Coulson et al., U.S. Appl. No. 09/894,310, filed Jun. 27, 2001.
Pending, Royer et al., U.S. Appl. No. 10/026,398, filed Dec. 21, 2001.
Coulson—U.S. Appl. No. 09/602,008 “In-Line Cache”.
Coulson—U.S. Appl. No. 09/602,009 “Non-Volatile Cache Expansion Board”.
Coulson—U.S. Appl. No. 09/602,010 “Non-Volatile Cache”.
Coulson—U.S. Appl. No. 09/602,011 “Non-Volatile Cache Integrated With Mass Storage Device”.
Coulson—U.S. Appl. No. 10/740,633 “Non-Volatile Mass Storage Cache Coherency Apparatus Administrator”.
Auciello et al—The Physics of Ferroelectric Memories, Physics Today, Jul. 1998, pp. 22-27.
SGS Thomson—GSF32-16×16/90 32 MByte SIMM Glash Memory Module 4 pages.
Derwent—Document ID RD 431135 A—A raid controller with a removable NVRAM cache on detecting a battery or an NVRAM fault automatically flushes all . . . 3 pages.
Derowitsch—Smart Computing—“The Quiet Role of Chipsets” Aug. 1998, vol. 9, Issue 8.
Diefendorff—Intel Tries Integrating Graphics—In-Star MDR Aug. 24, 1998.
DPT—Smart IV PM2144W PCI High Performance SCSI Adapter.
DPT—News Release—DPT's SmartCache IV RAID/Caching Kits Outperform Adaptec's SCSI Adapters in Independent Tests and Reviews—Aug. 1, 1996.
Hodges et al—1983, pp. 388-389—Analysis and Design of Digital Integrated Cicuits.
Intel—Jun. 1997—Intel 430HX PCIset Design Guide pp. 1-1 thru 6-15.
Intel—Apr. 1997—82371FB (PIIX) and 82371SB (PIIX3) PCI ISA IDE Xcelerator.
IRE Transactions—Component Parts—Switching the Memory Matrix.
Merz—Sep. 1955—Ferroelectric Storage Devices pp. 335-342.
Microsoft Press—Computer Dictionary 2nd Ed. 1994—Nondestructive readout, p. 270.
Moazzami et al—Oct. 1990, vol. 11, Issue 10 Citation and Abstract IEEE/IEE Electronic Library—A ferroelectic DRAM cell for high-density NVRAMs.
Mueller—2002—Upgrading and Repairing PCS—pp. 363-366 Chapter 9—Chipset Evolution.
NTIS—Dept of Navy—Jan. 14, 1974—Multi-Wire Cable to Coaxial Cable Transition Apparatus—ADD000450, 8 pages.
IBM Technical Disclosure Bulletin, Jul. 1982—Optical/Magnetic Storage Disk System, vol. 25, Issue 2 pp. 459-460.
Pulvari—Mar. 1956, pp. 3-11—Ferroelectrics and their Memory Applications.
Ramtron Dec. 7, 1999—FM24C64 64Kb FRAM Serial Memory—15 pages.
Ramtron Dec. 7, 1999—FM1608 64Kb Brtewide FRAM Memory—12 pages.
Ramtron Jan. 1994—FRAM Technol
Choi Woo H.
Trop Pruner & Hu P.C.
LandOfFree
Hardware updated metadata for non-volatile mass storage cache does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Hardware updated metadata for non-volatile mass storage cache, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Hardware updated metadata for non-volatile mass storage cache will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3776196