Implementing hardware interrupt event driven mechanism to...
Implementing signal processing cores as application specific...
Implementing signal processing cores as application specific...
Implementing snooping on a split-transaction computer system bus
Implementing termination with a default signal on a bus line
Imposing a delay for indication of a status board to provide...
Improving signal integrity in differential signal systems
In-line cache using nonvolatile memory between host and disk...
Inbound and outbound message passing between a host...
Inbound packet placement in host memory
Including descriptor queue empty events in completion events
Incorporation of bus ratio strap options in chipset logic
Increased computer peripheral throughput by using data...
Increased computer peripheral throughput by using data...
Increased speed initialization using dynamic slot allocation
Increased speed of processing of audio samples received over...
Increasing control information from a single general purpose...
Increasing I/O performance through storage of packetized operati
Increasing the quantity of I/O decode ranges using SMI traps
Increasing values of a read and a trigger pointers when a...